REMACORE – Signalgenerix

Reliable Manycore Chips (REMACORE)

Project Overview

REMACORE project investigates the design of reliable next-generation manycore chips. The project proposes a resilient system architecture and operation, where both design correctness (HW verification) and fabrication correctness (manufacturing test) are performed dynamically, during the life-time of the chip. A number of self-testing and/or fault-tolerant design mechanisms will be introduced for each of the architectural components (computation/control cores, memory, interconnection network), along with an innovative system-level methodology for monitoring the system status.

Partners Involved

  • University of Cyprus (Cyprus)
  • Cyprus University of Technology (Cyprus)
  • University of Bristol (UK)
  • SignalGeneriX Ltd (Cyprus)
This project is co-funded by the Cyprus Research Promotion Foundation under the Framework Programme for Research, Technological Development and Innovation 2008.